The present disclosure relates to semiconductor devices, and more particularly to semiconductor devices including high-dielectric constant gate insulating films and methods of manufacturing the devices.
With higher integration and higher operational speed of semiconductor devices, miniaturization of transistors has progressed. A complementary MOS (CMOS) device is provided with two transistors of an n-channel MOS transistor (hereinafter referred to as an “NMOS”) and a p-channel MOS transistor (hereinafter referred to as a “PMOS”). The NMOS controls on and off of currents by transfer of electrons, and the PMOS controls currents by transfer of holes.
Conventionally, gate insulating films being silicon oxide films having a dielectric constant of about 3.9 have been used for CMOS devices. However, when the thickness of a gate insulating film which is a silicon oxide film is reduced with miniaturization of a transistor, a leakage current increases, thereby increasing power consumption and standby electricity of a device. Thus, a gate insulating film has been developed, which is made of a high-k material having a dielectric constant of 4.0 or more, and of which equivalent oxide thickness (EOT) can be reduced, even when the actual thickness is formed large as compared to the case where a silicon oxide film is used.
However, simply by a combination of a high-k gate insulating film and a gate electrode made of polysilicon, which has been conventionally used, a phenomenon called “depletion” of the gate electrode occurs to damage the advantage of the high-k gate insulating film of having a small EOT. In the conventional gate electrode, impurities such as boron, phosphorus, etc. are ion-implanted into the polysilicon and activated by heat treatment, and then, the work function of the polysilicon is improved from 4.65 eV in an undoped state to 5.15 eV by ion-implanting boron, thereby controlling threshold voltages of the NMOS and the PMOS. However, when a high-k gate insulating film is used, Fermi level pinning occurs so that the work function cannot be changed by the ion implantation. Therefore, in order to reduce the depletion of the gate electrode, a high-k gate insulating film is essentially combined with a metal gate electrode. However, in a structure called “metal inserted poly-Si stack (MIPS),” in which a metal gate electrode and a polysilicon gate electrode are combined, the work function of the metal used for the gate electrode dominantly influences threshold values, and the work function is difficult to control by ion implantation. In research of work functions of a high-k gate insulating film and a metal gate electrode, the use of a nitride of titanium, tungsten, tantalum, and molybdenum has been considered. In particular, a nitride of titanium and tungsten, which has been conventionally used, is manageable as a material of a metal gate electrode in a dynamic random access memory (DRAM) in view of processing characteristics of dry etching, wet etching, etc.